View NCV8768ABD250R2G_3787209.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

? semiconductor components industries, llc, 2011 june, 2011 ? rev. 0 1 publication order number: ncv8768/d ncv8768 ultra low i q 150 ma ldo regulator with window watchdog, enable and reset the ncv8768 is 150 ma ldo regulator with integrated window watchdog and reset functions dedicated for microprocessor applications. its robustness allows ncv8768 to be used in severe automotive environments. ultra low quiescent current as low as 31 a typical makes it suitable for applications permanently connected to battery requiring ultra low quiescent current with or without load. the enable function can be used for further decrease of quiescent current down to 1 a. the ncv8768 contains protection functions as current limit and thermal shutdown. features ? output voltage options: 5 v ? output voltage accuracy: 1.5% (t j = 25 c to 125 c) ? output current up to 150 ma ? ultra low quiescent current: typ 31 a (max 35 a) ? very low dropout voltage ? enable function ? microprocessor compatible control functions: ? reset with adjustable power ? on delay ? window watchdog ? wide input voltage operation range: up to 40 v ? protection features: ? current limitation ? reverse output current ? thermal shutdown ? these are pb ? free devices typical applications ? body control module ? instruments and clusters ? occupant protection and comfort ? powertrain v bat ncv8768 v in v out gnd v out c in 0. 1 f ro wdi wm1 wm2 microprocessor v dd reset i/o i/o i/o c out 1.0 f en on off figure 1. application schematic soic ? 14 case 751a see detailed ordering and shipping information in the package dimensions section on page 16 of this data sheet. ordering information marking diagrams zz = timing, reset threshold, watchdog control options* xx = voltage options = 5 v (xx = 50) a = assembly location wl = wafer lot y = year ww = work week g= pb ? free package http://onsemi.com 1 14 v8768zzxxg awlyww 1 14 *see application information section.
ncv8768 http://onsemi.com 2 driver with current limit thermal shutdown v ref v out gnd reset generator and window watchdog v in ro wdi wm1 wm2 enable en figure 2. simplified block diagram wdi ro vout gnd wm 2 wm 1 gnd gnd gnd gnd 114 gnd gnd vin en soic ? 14 figure 3. pin connections (top view)
ncv8768 http://onsemi.com 3 pin function description pin no. soic ? 14 pin name description 1 ro reset output. 30 k internal pull ? up resistor connected to v out . ro goes low when v out drops by more than 7% from nominal. 2, 3, 4, 5, 10, 11, 12 gnd power supply ground. ? connect pin 2 and 3 to gnd ? connect pin 4 ? 5 and 10 ? 12 to heatsink area with gnd potential 6 wm2 watchdog mode bit 2; watchdog and reset mode selection. connect to v out or gnd. 7 wm1 watchdog mode bit 1; watchdog and reset mode selection. connect to v out or gnd. 8 wdi watchdog input; trigger input for watchdog pulses. when not used, connect to v out or gnd. 9 v out regulated output voltage. connect 1.0 f capacitor with esr < 100 to ground. 13 v in positive power supply input. connect 0.1 f capacitor to ground. 14 en enable input; low level disables the ic.
ncv8768 http://onsemi.com 4 absolute maximum ratings rating symbol min max unit input voltage (note 1) dc transient, t < 100 ms v in ? 0.3 ? 40 45 v input current i in ? 5 ? ma output voltage (note 2) v out ? 0.3 5.5 v output current i out ? 3 current limited ma enable input voltage range dc transient, t < 100 ms v en ? 0.3 ? 40 45 v enable input current range i en ? 1 1 ma reset output voltage (note 3) v ro ? 0.3 5.5 v reset output current i ro ? 3 3 ma watchdog input voltage v wdi ? 0.3 5.5 v watchdog mode 1 voltage v wm1 ? 0.3 5.5 v watchdog mode 1 current i wm1 ? 5 5 ma watchdog mode 2 voltage v wm2 ? 0.3 5.5 v watchdog mode 2 current i wm2 ? 5 5 ma junction temperature t j ? 40 150 c storage temperature tstg ? 55 150 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above t he recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may af fect device reliability. 1. refer to electrical characteristics and application information for safe operating area. 2. the output voltage must not exceed the input voltage. 3. the reset output voltage must not exceed the output voltage. esd capability (note 4) rating symbol min max unit esd capability, human body model esd hbm ? 2 2 kv esd capability, machine model esd mm ? 200 200 v 4. this device series incorporates esd protection and is tested by the following methods: esd human body model tested per aec ? q100 ? 002 (eia/jesd22 ? a114) esd machine model tested per aec ? q100 ? 003 (eia/jesd22 ? a115) lead soldering temperature and msl (note 5) rating symbol min max unit moisture sensitivity level msl 1 ? lead temperature soldering reflow (smd styles only), pb ? free versions (note 5) t sld ? 265 peak c 5. for information, please refer to our soldering and mounting techniques reference manual, solderrm/d
ncv8768 http://onsemi.com 5 thermal characteristics (note 6) rating symbol value unit thermal characteristics, soic ? 14 (note 6) thermal resistance, junction ? to ? air (note 7) thermal reference, junction ? to ? lead4 (note 7) r ja r jl 95 18.2 c/w 6. refer to electrical characteristics and application information for safe operating area. 7. values based on copper area of 645 mm 2 (or 1 in 2 ) of 1 oz copper thickness and fr4 pcb substrate. recommended operating ranges (note 8) rating symbol min max unit input voltage (note 9) v in 4.5 40 v junction temperature t j ? 40 150 c 8. refer to electrical characteristics and application information for safe operating area. 9. minimum v in = 4.5 v or (v out + v do ), whichever is higher. electrical characteristics v in = 13.2 v, c in = 0.1 f, c out = 1.0 f, for typical values t j = 25 c, for min/max values t j = ? 40 c to 150 c; unless otherwise noted. (notes 10 and 11) parameter test conditions symbol min typ max unit regulator output output voltage (accuracy %) t j = 25 c to 125 c v in = 5.5 v to 16 v, i out = 0.1 ma to 100 ma v out 4.925 ( ? 1.5%) 5.0 5.075 (+1.5%) v output voltage (accuracy %) v in = 5.55 v to 40 v, i out = 0.1 ma to 100 ma v in = 5.7 v to 16 v, i out = 0.1 ma to 150 ma v out 4.9 4.9 ( ? 2%) 5.0 5.0 5.1 5.1 (+2%) v output voltage (accuracy %) t j = ? 40 c to 125 c v in = 5.5 v to 28 v, i out = 0 ma v out 4.9 ( ? 2%) 5.0 5.1 (+2%) v line regulation v in = 5.5 v to 28 v, i out = 5 ma reg line ? 20 0 20 mv load regulation i out = 0.1 ma to 150 ma reg load ? 30 10 30 mv dropout voltage (note 12) i out = 100 ma i out = 150 ma v do ? ? 225 300 450 600 mv output capacitor for stability (note 13) i out = 0 ma to 150 ma c out esr 1.0 ? ? ? ? 100 f disable and quiescent current disable current v en = 0 v,t j < 85 c i dis ? ? 1 a quiescent current (i q = i in ? i out ) i out = 100 a, t j = 25 c i out = 100 a, t j 125 c i q ? ? 31 ? 35 36 a current limit protection current limit v out = 0.96 x v out_nom i lim 205 ? 525 ma short circuit current limit v out = 0 v i sc 205 ? 525 ma reverse output current protection reverse output current protection v en = 0 v, i out = ? 1 ma v out_rev ? 2 5.5 v psrr power supply ripple rejection (note 13) f = 100 hz, 0.5v pp psrr ? 60 ? db 10. refer to absolute maximum ratings and application information for safe operating area. 11. performance guaranteed over the indicated operating temperature range by design and/or characterization tested at t a t j . low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 12. measured when output voltage falls 100 mv below the regulated voltage at v in = 13.2 v. 13. values based on design and/or characterization. 14. recommended for typical trigger time. t wd = t cw + 1/2 * t ow
ncv8768 http://onsemi.com 6 electrical characteristics v in = 13.2 v, c in = 0.1 f, c out = 1.0 f, for typical values t j = 25 c, for min/max values t j = ? 40 c to 150 c; unless otherwise noted. (notes 10 and 11) parameter unit max typ min symbol test conditions enable thresholds enable input threshold voltage logic high logic low v th(en) 3 ? ? ? ? 0.8 v enable input current logic high logic low v en = 5 v v en = 0 v, t j < 85 c i en_on i en_off ? ? 3 0.5 5 1 a window watchdog watchdog mode bit 1 threshold voltage voltage increasing, logic high voltage decreasing, logic low v wm1,h v wm1,l ? 0.8 ? ? 4.0 ? v watchdog mode bit 2 threshold voltage voltage increasing, logic high voltage decreasing, logic low v wm2,h v wm2,l ? 0.8 ? ? 4.0 ? v watchdog input wdi threshold voltage voltage increasing, logic high voltage decreasing, logic low v wdi,h v wdi,l ? 0.8 ? ? 4.0 ? v watchdog input wdi current logic high logic low v wdi,h = 5 v v wdi,l = 0 v, t j < 85 c i wdi,h i wdi,l ? ? 3 0.5 4 1 a watchdog sampling time fast: wm2 = l slow: wm1 = l and wm2 = h t sam 0.4 0.8 0.5 1.0 0.6 1.2 ms ignore window time fast: wm2 = l slow: wm1 = l and wm2 = h t iw 25.6 51.2 32.0 64.0 38.4 76.8 ms open window time fast: wm2 = l slow: wm1 = l and wm2 = h t ow 25.6 51.2 32.0 64.0 38.4 76.8 ms closed window time fast: wm2 = l slow: wm1 = l and wm2 = h t cw 25.6 51.2 32.0 64.0 38.4 76.8 ms window watchdog trigger time (note 14) fast: wm2 = l slow: wm1 = l and wm2 = h t wd ? ? 48 96 ? ? ms watchdog deactivation current threshold i out decreasing v in > 5.5 v i out_wd_off 0.5 ? ? ma watchdog activating current threshold i out increasing v in > 5.5 v i out_wd_on ? 2 5 ma reset output ro output voltage reset threshold v out decreasing v in > 5.5 v v rt 90 93 96 %v out reset hysteresis v rh ? 2.0 ? %v out maximum reset sink current v out = 4.5 v, v ro = 0.25 v i romax 1.75 ? ? ma reset output low voltage v out > 1 v, i ro < 200 a v rol ? 0.15 0.25 v reset output high voltage v roh 4.5 ? ? v integrated reset pull up resistor r ro 15 30 50 k reset delay time fast: wm1 = l and wm2 = l slow:wm1 = h or (wm1 = l and wm2 = h) t rd 12.8 25.6 16 32 19.2 38.4 ms reset reaction time (see figure 24) t rr 16 25 38 s 10. refer to absolute maximum ratings and application information for safe operating area. 11. performance guaranteed over the indicated operating temperature range by design and/or characterization tested at t a t j . low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 12. measured when output voltage falls 100 mv below the regulated voltage at v in = 13.2 v. 13. values based on design and/or characterization. 14. recommended for typical trigger time. t wd = t cw + 1/2 * t ow
ncv8768 http://onsemi.com 7 electrical characteristics v in = 13.2 v, c in = 0.1 f, c out = 1.0 f, for typical values t j = 25 c, for min/max values t j = ? 40 c to 150 c; unless otherwise noted. (notes 10 and 11) parameter unit max typ min symbol test conditions thermal shutdown thermal shutdown temperature (note 13) t sd 150 175 195 c thermal shutdown hysteresis (note 13) t sh ? 25 ? c 10. refer to absolute maximum ratings and application information for safe operating area. 11. performance guaranteed over the indicated operating temperature range by design and/or characterization tested at t a t j . low duty cycle pulse techniques are used during testing to maintain the junction temperature as close to ambient as possible. 12. measured when output voltage falls 100 mv below the regulated voltage at v in = 13.2 v. 13. values based on design and/or characterization. 14. recommended for typical trigger time. t wd = t cw + 1/2 * t ow
ncv8768 http://onsemi.com 8 typical characteristics figure 4. quiescent current vs temperature figure 5. quiescent current vs input voltage figure 6. quiescent current vs output current figure 7. output voltage vs temperature figure 8. output voltage vs input voltage figure 9. dropout voltage vs output current v in = 13.2 v i out = 100 a t j , junction temperature ( c) i q , quiescent current ( a) 27 28 29 30 31 32 33 34 35 0 20 40 60 120 ? 40 ? 20 80 100 140 160 36 37 v in , input voltage (v) i q , quiescent current ( a) 0 50 100 150 200 0 5 10 15 30 20 25 35 40 i q , quiescent current ( a) i out , output current (ma) 30 31 32 33 34 35 36 37 150 c 25 c ? 40 c 0 25 50 75 150 100 125 4.90 4.95 5.00 5.05 5.10 0 20 40 60 120 t j , junction temperature ( c) v out , output voltage (v) ? 40 ? 20 80 100 140 160 0 1 2 3 4 5 6 012 v out , output voltage (v) v in , input voltage (v) 3456 0 100 200 300 400 500 600 v do , dropout voltage (mv) i out , output current (ma) 150 c 25 c ? 40 c 0 25 50 75 150 100 125 i out = 0 ma t j = 25 c v in = 13.2 v 38 28 29 v in = 13.2 v i out = 100 a 78 i out = 1 ma t j = 25 c
ncv8768 http://onsemi.com 9 typical characteristics figure 10. dropout vs temperature figure 11. current limit vs. input voltage figure 12. current limit vs. temperature figure 13. c out esr stability region vs output current figure 14. line transients figure 15. load transients 150 ma t j , junction temperature ( c) 0 20 40 60 120 ? 40 ? 20 80 100 140 160 0 100 200 300 400 500 600 v do , dropout voltage (mv) 100 ma 200 250 300 350 400 t j , junction temperature ( c) i lim , i sc , current limit (ma) 0 20 40 60 120 ? 40 ? 20 80 100 140 160 esr, stability region ( ) i out , output current (ma) 0.01 0.1 1 10 100 0 25 50 75 150 100 125 v in = 13.2 v t j = ? 40 c to 150 c c load = 1 f ? 100 f stable region 700 800 v in , input voltage (v) i lim , i sc , current limit (ma) 0 100 200 300 400 0 5 10 15 30 20 25 35 40 t j = 25 c i lim @ v out = 4.8 v i sc @ v out = 0 v v in = 13.2 v i lim @ v out = 4.8 v i sc @ v out = 0 v time (500 s/div) 12.2 v 14.2 v 4.99 v 5.14 v 13 v v in (1 v/div) v out (50 mv/div) t j = 25 c i out = 1 ma c out = 10 f t rise/fall = 1 s (v in ) t j = 25 c v in = 13.2 v c out = 10 f t rise/fall = 1 s (i out ) i out (0.1 a/div) v out (0.2 v/div) 150 ma 4.79 v 5.2 v 5 v 0.1 ma time (20 s/div) v reset (5 v/div)
ncv8768 http://onsemi.com 10 typical characteristics figure 16. power up/down response figure 17. psrr vs. frequency figure 18. noise vs. frequency figure 19. disable current vs temperature figure 20. disable current vs. input voltage figure 21. enable current vs. enable voltage f, frequency (hz) psrr (db) 0 1000 2000 3000 40 50 60 70 80 100 1000 10 10000 100000 90 100 t j = 25 c v in = 13.2 v 0.5 v pp c out = 1.0 f i out = 0.1 ma f, frequency (hz) noise density (nv/ hz) 4000 5000 6000 1000 10000 100000 t j = 25 c v in = 13.2 v c out = 1.0 f i out = 150 ma 30 20 10 0 100 10 0 1 2 3 4 t j , junction temperature ( c) i dis , disable current ( a) 0 20 40 60 120 ? 40 ? 20 80 100 140 160 v in = 13.2 v v en = 0 v v in , input voltage (v) i dis , disable current ( a) 0 1 2 3 4 0 5 10 15 30 20 25 35 40 v en = 0 v 150 c 125 c 85 c v en , enable voltage (v) i en , enable current ( a) 0 10 20 30 50 0 5 10 15 30 20 25 35 40 150 c 25 c ? 40 c v in = 13.2 v 40 t j = 25 c v en = v in r out = 5 k v in (5 v/div) v out (5 v/div) time (100 ms/div) v ro (5 v/div)
ncv8768 http://onsemi.com 11 typical characteristics figure 22. reset threshold vs temperature figure 23. reset delay time vs temperature 4.60 4.65 4.70 4.75 4.80 t j , junction temperature ( c) v rt , reset threshold (v) 0 20 40 60 120 ? 40 ? 20 80 100 140 160 v in = 13.2 v 14 15 16 17 18 t j , junction temperature ( c) t rd , reset delay time (ms) 0 20 40 60 120 ? 40 ? 20 80 100 140 160 v in = 13.2 v reset mode = fast
ncv8768 http://onsemi.com 12 typical characteristics v in t v out t v ro t v rt +v rhys i out_wd_on wd_on wd_on wd_off or i out < i out_wd_off wd_off or i out < i out_wd_off wd_off or i out < i out_wd_off wd_off or i out < i out_wd_off wd_off or i out < i out_wd_off wm1 l l h h wm2 l h l h window watchdog mode fast slow fast off reset mode fast slow slow slow figure 25. window watchdog state diagram, watchdog and reset modes
ncv8768 http://onsemi.com 13 typical characteristics t t t t t t iw 1st long ow cw ow ow iw 1st long ow 1st long ow 1st long ow iw iw iw cw cw cw ow t rd t rd t rd t rd t rr t iw t ow t cw t max =4xt ow i out_wd_off i out_wd_on current controled wd ? tu r n o f f don?t care during iw missing pulse during ow pulse during cw normal operation v rt v out i out v ro window v wdi v in +v rhys v rt v roh v rol t wd figure 26. window watchdog signal diagram closed window open window wdi wdi closed window open window wdi wdi valid not valid watchdog trigger signal watchdog decoder sample point t ecw t eow figure 27. valid wdi trigger signal
ncv8768 http://onsemi.com 14 definitions general all measurements are performed using short pulse low duty cycle techniques to maintain junction temperature as close as possible to ambient temperature. output voltage the output voltage parameter is defined for specific temperature, input voltage and output current values or specified over line, load and temperature ranges. line regulation the change in output voltage for a change in input voltage measured for specific output current over operating ambient temperature range. load regulation the change in output voltage for a change in output current measured for specific input voltage over operating ambient temperature range. dropout voltage the input to output differential at which the regulator output no longer maintains regulation against further reductions in input voltage. it is measured when the output drops 100 mv below its nominal value. the junction temperature, load current, and minimum input supply requirements affect the dropout level. quiescent currents quiescent current (i q ) is the difference between the input current (measured through the ldo input pin) and the output current. current limit and short circuit current limit current limit is value of output current by which output voltage drops below 96% of its nominal value. short circuit current limit is output current value measured with output of the regulator shorted to ground. psrr power supply rejection ratio is defined as ratio of output voltage and input voltage ripple. it is measured in decibels (db). line transient response typical output voltage overshoot and undershoot response when the input voltage is excited with a given slope. load transient response typical output voltage overshoot and undershoot response when the output current is excited with a given slope between low ? load and high ? load conditions. thermal protection internal thermal shutdown circuitry is provided to protect the integrated circuit in the event that the maximum junction temperature is exceeded. when activated at typically 175 c, the regulator turns off. this feature is provided to prevent failures from accidental overheating. maximum package power dissipation the power dissipation level is maximum allowed power dissipation for particular package or power dissipation at which the junction temperature reaches its maximum operating value, whichever is lower. applications information the ncv8768 regulator is self ? protected with internal thermal shutdown and internal current limit. typical characteristics are shown in figures 4 to 27. input decoupling (c in ) a ceramic or tantalum 0.1 f capacitor is recommended and should be connected close to the ncv8768 package. higher capacitance and lower esr will improve the overall line and load transient response. if extremely fast input voltage transients are expected then appropriate input filter must be used in order to decrease rising and/or falling edges below 50 v/ s for proper operation. the filter can be composed of several capacitors in parallel. output decoupling (c out ) the ncv8768 is a stable component and does not require a minimum equivalent series resistance (esr) for the output capacitor. stability region of esr versus output current is shown in figure 13. the minimum output decoupling value is 1.0 f and can be augmented to fulfill stringent load transient requirements. the regulator works with ceramic chip capacitors as well as tantalum devices. larger values improve noise rejection and load regulation transient response. enable operation the enable pin will turn the regulator on or off. the threshold limits are covered in the electrical characteristics table in this data sheet. reset operation a reset signal is provided on the reset output (ro) pin to provide feedback to the microprocessor of an out of regulation condition. the timing diagram of reset function is shown in figure 24. this is in the form of a logic signal on ro. output voltage conditions below the reset threshold cause ro to go low. the ro integrity is maintained down to v out = 1.0 v. the reset output (ro) circuitry includes
ncv8768 http://onsemi.com 15 a pull ? up resistor (30 k ) internally connected to the output (v out ). no external pull ? up is necessary. window watchdog operation the watchdog slow, fast or off state is set by pins wm1 and wm2 (see table in figure 25). the timing values used in this description refer to typ. values when wm1 and wm2 are connected to gnd (fast watchdog and reset timing). the state diagram of the window watchdog (wwd) and the watchdog and reset mode selection table is shown in figure 25. the wwd timing is shown in figure 26. after power ? on, the reset output signal at the ro pin (microprocessor reset) is kept low for the reset delay time t rd (16 ms). ro signal transition from low to high triggers the ignore window (iw) with duration of t iw (32 ms). during this window the signal at the wdi pin is ignored. when iw ends a long open window with maximum duration of (128 ms, t max = 4xt ow ) is started. when a valid trigger signal is detected during long open window, a closed window (cw) with duration of t cw (32 ms) is initialized immediately. wdi signal transition from high to low is taken as a trigger. as valid trigger two high samples followed by two low samples (with sampling time t sam = 0.5 ms) have to be present before end of the long window. valid wdi trigger signal is shown in figure 27. when cw ends a standard open window (ow) with maximum duration of t ow (32 ms) is initiated immediately. the ow ends immediately when valid trigger appears at wdi input. for normal operation the microprocessor timing of wdi pulses must be stable and correspond to t wd . a reset signal is generated (ro goes low) if there is no valid trigger (missing pulse at wdi pin) during ow or if a pre ? trigger occurs during the cw (unexpected pulse at wdi pin). thermal considerations as power in the ncv8768 increases, it might become necessary to provide some thermal relief. the maximum power dissipation supported by the device is dependent upon board design and layout. mounting pad configuration on the pcb, the board material, and the ambient temperature affect the rate of junction temperature rise for the part. when the ncv8768 has good thermal conductivity through the pcb, the junction temperature will be relatively low with high power applications. the maximum dissipation the ncv8768 can handle is given by: p d(max) t j(max) t a r ja (eq. 1) since t j is not recommended to exceed 150 c, then the ncv8768 soldered on 645 mm 2 , 1 oz copper area, fr4 can dissipate up to 1.3 w when the ambient temperature (t a ) is 25 c. see figure 28 for r ja versus pcb area. the power dissipated by the ncv8768 can be calculated from the following equations: p d v in i q @i out
i out v in v out
(eq. 2) or v in(max) p d(max) v out i out
i out i q (eq. 3) figure 28. thermal resistance vs pcb copper area copper heat spreader area (mm 2 ) r ja , thermal resistance ( c/w) 80 90 100 110 120 0 100 200 300 600 400 500 700 pcb 2 oz cu soic ? 14 130 140 pcb 1 oz cu hints v in and gnd printed circuit board traces should be as wide as possible. when the impedance of these traces is high, there is a chance to pick up noise or cause the regulator to malfunction. place external components, especially the output capacitor, as close as possible to the ncv8768, and make traces as short as possible.
ncv8768 http://onsemi.com 16 ordering information device v out t rd fast/ slow iw/ow/cw time fast/ slow 1 st low time fast/ slow v rt output current ww on/ off marking package shipping ? NCV8768ABD250R2G 5.0 v 16 / 32 ms 32 / 64 ms 128 / 256 ms 93% yes v8768ab50g soic ? 14 (pb ? free) 2500 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d. note: contact factory for other package, output voltage, timing and reset threshold options
ncv8768 http://onsemi.com 17 package dimensions soic ? 14 case 751a ? 03 issue k notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b does not include dambar protrusion. allowable protrusion shall be 0.13 total in excess of at maximum material condition. 4. dimensions d and e do not include mold protrusions. 5. maximum mold protrusion 0.15 per side. h 14 8 7 1 m 0.25 b m c h x 45 seating plane a1 a m s a m 0.25 b s c b 13x b a e d e detail a l a3 detail a dim min max min max inches millimeters d 8.55 8.75 0.337 0.344 e 3.80 4.00 0.150 0.157 a 1.35 1.75 0.054 0.068 b 0.35 0.49 0.014 0.019 l 0.40 1.25 0.016 0.049 e 1.27 bsc 0.050 bsc a3 0.19 0.25 0.008 0.010 a1 0.10 0.25 0.004 0.010 m 0 7 0 7 h 5.80 6.20 0.228 0.244 h 0.25 0.50 0.010 0.019 6.50 14x 0.58 14x 1.18 1.27 dimensions: millimeters 1 pitch soldering footprint* *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5773 ? 3850 ncv8768/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative

▲Up To Search▲

Price & Availability of NCV8768ABD250R2G

	To Download NCV8768ABD250R2G Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .